The analog front end of the current wireless terminal (transceiver) mainly realizes a low noise amplifier, a power amplifier, a mixer, a filter, a VCO (Voltage Controlled Oscillator), and a PLL (Phase Locked Loop) block. In addition, despite the demand for miniaturization of wireless communication equipment in recent years, its service contents are becoming increasingly complicated. By this flow, realization of the analog front end by CMOS (Complementary Metal Oxide Semiconductor) process makes it possible to mix with the digital circuit, so that the module including the RF front end to the baseband section and further the digital signal processing section It was also possible to configure with one chip. Besides, using the CMOS process has the advantage of providing peak performance for applications requiring high speed data transfer, low noise, high linearity and low power consumption. In addition, due to the development of IoT (Internet of Things) and the like, the communication volume of radio communication has been increasing year by year, and attention is being paid to high capacity technology such as full-duplex communication and beam forming in array antenna. As a hardware technology to realize these, we develop a front end using CMOS process. We are aiming for integration in quasi-millimeter wave CMOS process for fifth generation mobile communication.
